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MLNetSec: Advancing Networking and Security for AI/ML Era

About the workshop

In an era where artificial intelligence (AI) and machine learning (ML) are reshaping the landscape of computing, both networking and cryptography face significant challenges. Traditional networking solutions like Ethernet, InfiniBand, RDMA, RoCE, and TCP are proving insufficient to meet the demands of distributed AI/ML training workloads. Similarly, current cryptographic algorithms are threatened by the advent of quantum computing, necessitating the exploration of quantum-resistant methods. This workshop will provide a comprehensive overview of these challenges and explore current solutions, highlighting their limitations in addressing AI/ML complexities such as bandwidth bottlenecks, latency sensitivities, and security threats.

We will delve into the latest advancements in networking technologies designed to overcome these limitations, including Ultra Ethernet and Google’s Falcon protocol, as presented in our keynote sessions. The workshop will also address Fully Homomorphic Encryption (FHE) and its role in enabling universal computation on encrypted data, which will be covered in depth during our technical sessions. Additionally, the impact of quantum computing on security will be discussed, introducing post-quantum cryptographic methods designed to withstand these new threats. Participants will gain practical insights through our technical sessions on post-quantum cryptography and its applications.

The workshop will feature two deep dives: one focusing on data plane technologies and the other on cryptography in the quantum era. These sessions will provide deep insights into cutting-edge technologies and techniques, enhancing participants' understanding and skills in modern networking and cryptographic methods.By the end of the workshop, participants will have a solid understanding of the advanced networking and security technologies essential for supporting the AI/ML era, equipped with both theoretical knowledge and practical skills.

Schedule

Morning Session

Time Event Speakers
09:00 - 09:15 Opening Remarks -
09:15 - 10:15 Keynote 1: Evolution of Ethernet Transport for AI and HPC Networking Dr. Rinku, IIIT Delhi
and Satanada, Marvell
10:15 - 11:00 Keynote 2: AI/ML NIC and Programmable Data-planes -
11:00 - 11:15 Networking Break -
11:15 - 12:00 Panel: Programmable Dataplanes - Ready to be unleashed? -
12:00 - 12:30 Introducing Accelerated Compute -
12:30 - 13:30 Lunch Break -

Afternoon Session

Time Event Speakers
13:30 - 14:00 Paper talk: Detecting adversial samples using kernel density feature extractor in medical image
Authors: Suman D, Pankaj K, Mahesh C (NIT-Sikkhim)		 TBD
14:00 - 14:45 Keynote 3: FHE: System for Universal Computation on Encrypted Data Rohit Khera, Marvell
14:45 - 15:00 Networking Break -
15:00 - 16:00 Hands-on Session 1: Introducing AI/ML Accelerators Srikanth Y , Marvell
16:00 - 17:00 Hands-on Session 2: Introducing Programmable Packet and Crypto Accelerators Venkata R, Marvell
17:00 - 17:45 Panel: AI, Networking & Security: Academia-Industry Research Opportunities -
17:45 - 18:00 Closing Remarks -

Keynote 1: Evolution of Ethernet Transport for AI and HPC Networking

Exploration of challenges in networking for AI/ML workloads, future protocol developments, and advancements such as Ultra Ethernet and Google's Falcon protocol. Includes a discussion on simulation tools and community efforts from IIIT-D.

Speakers:

Rinku Shah
Dr. Rinku Shah

Dr. Rinku Shah is currently an Assistant Professor in the CSE department at Indraprastha Institute of Information Technology, Delhi (IIITD). She earned her PhD from IIT Bombay in February 2021. Her research interests lie in the broad area of networked systems with applications in security and machine learning. She has published her research at reputed conference venues such as ACM SOSR, IEEE ICNP, IEEE/IFIP Networking, ACM SIGCOMM FFSPIN, and ACM APNet.

Satananda burla
Satananda Burla

Satananda Burla is a Senior Principal Engineer at Marvell, specializing in the research and development of cutting-edge networking and storage infrastructure solutions tailored for AI, cloud, and enterprise markets. He actively represents Marvell in technical forums, including the OPI Technical Steering Committee (TSC), OASIS VIRTIO, and the Ultra Ethernet Consortium (UEC), where he has contributed to the development of key specifications.

Keynote 3: FHE – System for Universal Computation on Encrypted Data

An in-depth discussion on fully homomorphic encryption (FHE) and its applications in secure private computation and inference on encrypted data.

Speakers:

Rohit Khera
Rohit Khera

Rohit Khera is a Distinguished Engineer at Marvell Technologies with a strong background in applied cryptography, protocols, numerical physics, and software. He has worked extensively on lattice cryptography, fully homomorphic encryption (FHE), multiparty computation, and succinct zero-knowledge arguments. His work focuses on optimizing sub-operations in FHE schemes, such as rescaling/re-linearization of tensored ciphertexts, boosted key switching, automorphisms on packed ciphertexts, and the representation of non-linear functions in encrypted domains for ML inference.

Hands-on Session 1: Introducing AI/ML Inferencing Accelerators

Topics Covered:

Trainer:
Srikanth Yalavarthi – Principal Engineer, Machine Learning Team, Marvell Technology
Expertise: ML drivers, DPDK’s Machine Learning library, and ML in networking.

Hands-on Session 2: Introducing Programmable Packet and Crypto Accelerators

Topics Covered:

Trainer:
Venkata Ravichandra Mynidi – Senior Principal Engineer, Accelerated Solutions Group, Marvell Technology
Expertise: Network security stacks, OpenSSL, VPP, DPDK, and TCP/UDP transport stacks.